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nt7603 single-chip 16c x 2l dot-matrix lcd controller / driver 1 v2.2 features internal lcd drivers 16 common signal drivers 80 segment signal drivers maximum display dimensions 16 characters x 2 lines or 32 characters x 1 line interfaces with 4-bit or 8-bit mpu versatile display functions provided on chip: display clear, cursor home, display on/off, cursor on/off, character blinking, cursor shift, and display shift three duty factors, selected by program: 1/8, 1/11, and 1/16 displays data ram (dd ram): 80 x 8 bits (displays up to 80 characters) character generator ram (cg ram): 64 x 8 bits for general data, 8 5 x 8 programmable dot patterns, or 4 5 x 10 programmable dot patterns low voltage reset ito option for a-type and b-type lcd waveform character generator rom (cg rom): 2 kinds of cg rom sizes: 192 characters: 160 5 x 8 dot patterns 32 5 x 10 dot patterns 240 characters: 192 5 x 8 dot patterns 48 5 x 10 dot patterns custom cg rom is also available built-in power-on reset function logic power supply: 2.8v ~ 5.5v lcd driver power supply: v1 ~ v5 (v dd + 0.3 - v dd - 7.0), divided by built-in lcd power division resister. two oscillator operations (freq. = 500khz - 540khz): ? built-in rc oscillation ? external clock cmos process available in cog form general description the nt7603 is a dot matrix lcd controller and driver lsi that can operate with either a 4-bi t or an 8-bit microprocessor (mpu). the nt7603 receives control character codes from the mpu, stores them in an internal ram (up to 80 characters) before transforming each character code into a 5 x 7, 5 x 8, or 5 x 10 dot ma trix character pattern and then displaying the codes on the lcd panel. the built-in character generator rom c onsists of 256 different character patterns. the nt7603 also contains char acter generator ram where the user can store 8 different character patterns at run time. these memory features make t he character display flexible. nt7603 also provides many disp lay instructions to achieve versatile lcd display functi ons. the nt7603 is fabricated on a single lsi chip using the cmos process, resulting in very low power requirements.
nt7603 2 v2.2 pad configuration 1 66 67 83 84 150 149 166 size item pad no. x y unit chip size - 5156 1349 pad pitch 1 - 166 70 m
nt7603 3 v2.2 block diagram i/o buffer v1 v2 v3 v4 v5 rs r/w e db7 ~ db4 db3 ~ db0 4 4 instruction register (ir) 8 instruction decode 8 address counter v dd gnd osc1 osc2 timing generator data register (dr) busy flag (bf) 8 7 7 character generator ram (cg ram) 64 x 8 bits cursor address counter display data ram (dd ram) 80 x 8 bits 16-bit shift register common signal driver 7 cursor /blink controller 7 7 7 lcd driver voltage generator 16 8 8 character generator rom (cg rom) 8 16 com1 i com16 80-bit latch circuit segment signal driver 80 80 seg1 i seg80 paraller - to - serial converter 5 5 testm 7 opt_r0 opt_r1 opt_lcd test testd
nt7603 4 v2.2 pad description (total 166 pads for cog type) pad no. designation i/o external connection description 1 - 15 gnd p power supply gnd: 0v 16 osc1 i for external clock operation, clock inputs to osc1 17 osc2 o clock output 18 v1 p power supply power supply for lcd driver. v dd v1 v2 v3 v4 v5 gnd 19 v2 p power supply power supply for lcd driver 20 v3 p power supply power supply for lcd driver 21 v4 p power supply power supply for lcd driver 22 - 25 v5 p power supply power supply for lcd driver 26, 28 opt_r0, opt_r1 i ito option the built-in bias resister select: opt_r1, opt_r0: no ito = 1. ito on = 0 1, 1: 2.2k ; 1, 0: 4k ; 0, 1: 6.8k ; 0, 0:no built-in bias resistor 29 - 43 v dd p power supply v dd : +5v 44, 45 rs i mpu register select signal 0: instruction register (write), busy flag, address counter (read) 1: data register (write, read) 46, 47 r/w i mpu read/write control signal 0: write 1: read 48, 49 e i mpu read/write start signal 50, 51 db0 52, 53 db1 54, 55 db2 56, 57 db3 i/o mpu lower 4 tri-state bi-directional data bus for transmitting data between mpu and nt7603. not us ed during 4-bit operation. 58, 59 db4 60, 61 db5 62, 63 db6 64, 65 db7 i/o mpu higher 4 tri-state bi-directional data bus for transmitting data between mpu and nt7603. db7 is also used as a busy flag. 66 opt_lcd i ito option no ito. (option = 1): b-type waveform ito on. (option = 0): a-type waveform 68 testd o test output test data output. (no connect for user) 164 - 157 com1 - 8 o lcd panel 69 - 76, com9 - 16 o lcd panel common signal output pins, for place on the upper glass (ic face up) 156 - 77 seg1 - 80 o lcd panel segment signal output pins 165 test i test pin test pin (internal pull down) (no connection for user) 166 testm o test output lcd driver clock output. (no connection for user) 67, 27 gnd_out p gnd output pi n, used for pull-down ito option
nt7603 5 v2.2 functional description the nt7603 is a dot-matrix lcd controller and driver lsi. it operates with either a 4-bit or an 8-bit microprocessor (mpu). the nt7603 receives both inst ructions and data from the mpu. some instructions set operation modes, such as the function mode, data entry mode, and display mode; as well as some control lcd display functions, such as clear display, restore display, shift display, and cursor. other instructions include reading and writing bot h data and addresses. all instructions allow users conv enient and powerful functions to control the lcd dot-matrix displays. data is written into, and read from the data display ram (dd ram) or the character generator ram (cg ram). as display character codes, t he data stored in the dd ram decodes a set of dot-matrix char acter patterns that are built into the character generat or rom (cg rom). the cg rom, with many character patterns (up to 256 patterns), defines the character pattern fonts. the nt7603 regularly scans the character patterns through the segment drivers. the cg ram stores character pa ttern fonts at run time if users intend to show characte r patterns that are not defined in the cg rom. this feat ure makes character display flexible. other unused bytes can be used as general-purpose data storage. the lcd driver circuit consis ts of 16 common signal drivers and 80 segment signal driver s allowing a variety of application configurations to be implemented. character generator rom (cg rom) the character generator rom generates lcd dot character patterns from the 8-bit character pattern codes. the nt7603 provides 2 cg rom configurations: 1. 192 characters: the cg rom contains 160 5 x 8 dot character patterns and 32 5 x 10 dot character pattern s. the relation between the character codes and character patterns is shown in table 1. the character codes from 00h to 0fh are used to get character patterns from the cg ram. character codes from 10h to 1fh, from 80h to 9fh and 20h map to null character patterns. character codes from e0h to ffh are assigned to generate 5 x 10 dot character pa tterns, and other codes are used to generate 5x8 dot character patterns. 2. 240 characters: the cg rom contains 192 5 x 8 dot character patterns and 48 5 x 10 dot character pattern s. the relation between the character codes and character patterns is shown in table 2. the character codes from 00h to 0fh are used to get character patterns from the cg ram. character codes from 10h to 1fh and from e0h to ffh are assigned to generate 5 x 10 dot character patterns, and other codes to generate 5 x 8 dot character patterns. only one null character pattern exists in this type. note t hat the underlined cursor, displayed on the 8th duty may be obscure if the 8th row of a dot character pattern is coded. we recommend that users display the cursor in the blin king mode if they code 5x8 dot character patterns as their custom cg rom. custom character patterns are available by mask-programming rom. for convenience of character pattern development, novatek has developed a user-friendly editor program for the nt7603 to help determine the character patterns users prefer. by executing the program on the computer , users can easily create and modify their character patterns. by transferring the resulting files generated by the program through a modem or some other communication method, the user and novatek will have established a reliable, fast link for programming the cg rom.
nt7603 6 v2.2 absolute maximum ratings* power supply voltage (v dd ) . . . . . . . . . . -0.3v to + 7.0v power supply voltage (v 1 to v 5 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd to v dd + 0.3v input voltage (v i ) . . . . . . . . . . . . . . . -0.3v to v dd + 0.3v operating temperature (t opr ) . . . . . . .-20 c to + 70 c storage temperature (t stg ) . . . . . . . .-55 c to + 125 c *comments stresses above those listed under "absolute maximum ratings" may cause permanent damage to this device. these are stress ratings only. functional operation of this device at these or any other conditions above those indicated in the operational sections of th is specification is not implied or intended. exposure to t he absolute maximum rating conditions for extended periods may affect device reliability. all voltage values are referenced to gnd = 0v v 1 to v 5 , must maintain v dd v 1 v 2 v 3 v 4 v 5 gnd dc electrical characteristics (v dd = 5.0v, gnd = 0v, t a = 25 c) symb ol parameter min. typ. max. unit conditions applicable pin v dd operating voltage 2.8 5.0 5.5 v v ih1 "h" level input voltage (1) 0.8 v dd - v dd v db0 - db7, rs, r/w, v il1 "l" level input voltage (1) -0.3 - 0.2 v dd v e,osc1 v oh1 "h" level output voltage (1) v dd - 0.6 - - v i oh = -1.2ma db0 - db7 v ol1 "l" level output voltage (1) - - gnd + 0.6 v i ol = 1.2ma (cmos) v com driver voltage descending (com) - - 0.3 v i d = 5 a com1 - 16 v seg driver voltage descending (seg) - - 0.3 v i d = 5 a seg1 - 80 i il input leakage current -1 - 1 a v in = 0 to v dd not include osc1 -i p pull-up mos current 50 125 250 a v dd = 5v rs, r/w, db0-db7 i op power supply current - 1 1.5 ma rf oscillation, from external clock v dd = 5v, f osc = f cp = 540khz, include lcd bias current. v dd external clock operation fcp external clock operating frequency 380 540 750 khz tduty external clock duty cycle 45 50 55 % trcp external clock rising time 0.1 - 0.5 s tfcp external clock falling time 0.1 - 0.5 s internal clock operation (built-in rc oscillator) fosc oscillator frequency 380 540 750 khz v dd = 2 .8v ~ 5.5v vlcd lcd driving voltage 3.0 - v dd v v dd - v5
nt7603 7 v2.2 dc electrical characteristics (continued) (v dd = 3.0v, gnd = 0v, t a = 25 c) symbol parameter min. typ. max. unit conditions applicable pin v dd operating voltage 2.8 3.0 5.5 v v ih1 "h" level input voltage (1) 0.8 v dd - v dd v db0 - db7, rs, r/w, v il1 "l" level input voltage (1) -0.3 - 0.2 v dd v e,osc1 v oh1 "h" level output voltage (1) v dd - 0.4 - - v i oh = -0.8ma db0 - db7 v ol1 "l" level output voltage (1) - - gnd + 0.4 v i ol = 0.8ma (cmos) v com driver voltage descending (com) - - 0.3 v i d = 5 a com1 - 16 v seg driver voltage descending (seg) - - 0.3 v i d = 5 a seg1 - 80 i il input leakage current -1 - 1 a v in = 0 to v dd not include osc1 -i p pull-up mos current 30 75 150 a v dd = 3v rs, r/w, db0-db7 i op power supply current - 1 1.5 ma rf oscillation, from external clock v dd = 3.0v, f osc = f cp = 540khz, include lcd bias current. v dd external clock operation fcp external clock operating frequency 380 540 750 khz tduty external clock duty cycle 45 50 55 % trcp external clock rising time 0.1 - 0.5 s tfcp external clock falling time 0.1 - 0.5 s internal clock operation (built-in rc oscillator) fosc oscillator frequency 380 540 750 khz rf = 50k ? (reference only) v dd = 2 .8v ~ 5.5v vlcd lcd driving voltage 2.5 - v dd v v dd - v5
nt7603 8 v2.2 ac characteristics read cycle (v dd = 5.0v, gnd = 0v, t a = 25 c) symbol parameter min. typ. max. unit conditions t cyce enable cycle time 500 - - ns figure 1 t whe enable "h" level pulse width 300 - - ns figure 1 t re , t fe enable rising/falling time - - 25 ns figure 1 t as rs, r/w setup time 60 1 - - ns figure 1 100 2 t ah rs, r/w address hold time 10 - - ns figure 1 t rd read data output delay - - 190 ns figure 1 t dhr read data hold time 20 - - ns figure 1 write cycle (v dd = 5.0v, gnd = 0v, t a = 25 c) symbol parameter min. typ. max. unit conditions t cyce enable cycle time 500 - - ns figure 2 t whe enable "h" level pulse width 300 - - ns figure 2 t re , t fe enable rising/falling time - - 25 ns figure 2 t as rs, r/w setup time 60 1 - - ns figure 2 100 2 t ah rs, r/w address hold time 10 - - ns figure 2 t ds data output delay 100 - - ns figure 2 t dhw data hold time 10 - - ns figure 2 notes: 1: 8-bit operation mode 2: 4-bit operation mode power supply conditions using internal reset circuit (vdd = 5.0v, gnd = 0v, ta = 25 c) symbol parameter min. typ. max. unit conditions t ron power supply rising time 0.1 - 10 ms figure 3 t off power supply off time 1 - - ms figure 3
nt7603 9 v2.2 ac characteristics (continued) read cycle (v dd = 3.0v, gnd = 0v, t a = 25 c) symbol parameter min. typ. max. unit conditions t cyce enable cycle time 500 - - ns figure 1 t whe enable "h" level pulse width 300 - - ns figure 1 t re , t fe enable rising/falling time - - 25 ns figure 1 t as rs, r/w setup time 60 1 - - ns figure 1 100 2 t ah rs, r/w address hold time 10 - - ns figure 1 t rd read data output delay - - 190 ns figure 1 t dhr read data hold time 20 - - ns figure 1 write cycle (v dd = 3.0v, gnd = 0v, t a = 25 c) symbol parameter min. typ. max. unit conditions t cyce enable cycle time 500 - - ns figure 2 t whe enable "h" level pulse width 300 - - ns figure 2 t re , t fe enable rising/falling time - - 25 ns figure 2 t as rs, r/w setup time 60 1 - - ns figure 2 100 2 t ah rs, r/w address hold time 10 - - ns figure 2 t ds data output delay 150 - - ns figure 2 t dhw data hold time 10 - - ns figure 2 notes: 1: 8-bit operation mode 2: 4-bit operation mode power supply conditions using internal reset circuit (v dd = 3.0v, gnd = 0v, t a = 25 c) symbol parameter min. typ. max. unit conditions t ron power supply rising time 0.1 - 10 ms figure 3 t off power supply off time 1 - - ms figure 3
nt7603 10 v2.2 timing waveforms read operation rs r/w e db0 ~ db7 v ih1 v il1 t re t rd v oh1 v ol1 vaild data v ih1 v il1 t as v ih1 v il1 t ah t whe t fe v il1 t dhr v oh1 v ol1 t cyce v il1 figure 1. bus read operation sequence (reading out data from nt7603 to 8-bit mpu) write operation rs r/w e db0 ~ db7 v ih1 v il1 t re t ds v ih1 v il1 vaild data v ih1 v il1 t as v ih1 v il1 t ah t whe t fe v il1 t dhw v ih1 v il1 t cyce v il1 v il1 figure 2. bus writ e operation sequence (writing data from 8-bit mpu to nt7603) interface signals with segment driver lsi v dd 0.2v t ron 4.5v 0.1ms > t ron > 10ms t off 0.2v 0.2v t off > 1ms figure 3. t off stipulates the time of power off for instantaneous power supply to or when power supply repeats on and off
nt7603 11 v2.2 note 1: the nt7603 has two clock options: a. internal oscillator (built-in rc) osc1 osc2 open open b. external clock operation osc1 osc2 open pulse input note 2: input/output terminals: a. input terminal applicable terminal: e (no pull up mos) pmos v dd nmos applicable terminal: rs, r/w (with pull up mos) pmos v dd nmos v dd pmos pull up mos
nt7603 12 v2.2 b. output terminal applicable terminal: testm pmos v dd nmos c i/o terminal applicable terminal: db0 to db7 nmos v dd pmos pull up mos pmos v dd pmos v dd nmos enable data (output circuit) (tristate) note 3: ito options: set option = 0: place ito on the option pad set option = 1: no ito on the option pad gnd_out option pad option (internal pull up) option = 1 no ito: option pad ito on: ito option = 0 option (internal pull up) gnd output pad gnd output pad gnd_out
nt7603 13 v2.2 table 1. nt7603h-bdt01 corres pondence between character c odes and character patterns (novatek standard 192 character cg rom)
nt7603 14 v2.2 instruction set code function execution time (max) instruction rs rw db7 db6 db5 db4 db3 db2 db1 db0 (fosc = 540khz) display clear 0 0 0 0 0 0 0 0 0 1 clear entire display area, restore display from shift, and load address counter with dd ram address 00h. 1.64ms display/ cursor home 0 0 0 0 0 0 0 0 1 * restore display from shift and load address counter with dd ram address 00h. 1.64ms entry mode set 0 0 0 0 0 0 0 1 i/d s specify direction of cursor movement and display shift mode. this operation takes place after each data transfer (read/write). 40 s display on/off 0 0 0 0 0 0 1 d c b specify activation of display (d) cursor (c) and blinking of character at cursor position (b). 40 s display/ cursor shift 0 0 0 0 0 1 s/c r/l * * shift display or move cursor. 40 s function set 0 0 0 0 1 dl n f * * set interface data length (dl), number of display line (n), and character font (f). 40 s ram address set 0 0 0 1 acg load the address counter with a cg ram address. subsequent data access is for cg ram data. 40 s dd ram address set 0 0 1 add load the address counter with a dd ram address. subsequent data access is for dd ram data. 40 s busy flag/ address counter read 0 1 bf ac read busy flag (bf) and contents of address counter (ac). 1 s cg ram/ dd ram data write 1 0 write data write data to cg ram or dd ram. 40 s cg ram/ dd ram data read 1 1 read data read data from cg ram or dd ram. 40 s i/d = 1 : increment i/d = 0 : decrement s = 1 : display shift on d = 1 : display on c = 1 : cursor display on b = 1 : cursor blink on s/c = 1 : shift display s/c = 0 : move cursor r/l = 1 : shift right r/l = 0 : shift left dl = 1 : 8-bit dl = 0 : 4-bit n = 1 : dual line n = 0 : signal line f = 1 : 5x10 dots f = 0 : 5 x 8 dots bf = 1 : internal operation bf = 0 : ready for instruction dd ram : display data ram cg ram : character generator ram acg : character generator ram address add : display data ram address ac : address counter note 1: symbol "*" signifies an insignificant bit (disregard). note 2: correct input value for "n" is predetermined for each model. note 3: the variation of execution time depends on the change of oscillator frequency; for example: if f osc = 380khz, then execution time = 40 s (540khz / 380khz) = 57 s
nt7603 15 v2.2 interface to lcd (1) character font and number of lines the nt7603 provides a 5 x 7 dot character font 1-line mode, a 5 x 10 dot character font 1-line mode and a 5 x 7 dot character font 2-line mode, as shown in the table below. three types of common signals are available as displayed in the table. the number of li nes and the font type can be selected by the program. number of lines character font number of common signals duty factor bias 1 5 x 7 dots + cursor (or 5 x 8 dots) 8 1/8 1/4 1 5 x 10 dots + cursor 11 1/11 1/4 2 5 x 7 dots + cursor (or 5 x 8 dots) 16 1/16 1/5 (2) connection to lcd the following 4 lcd connection examples show the va rious combinations between characters and lines. nt7603 can directly drive the following combinations: (a) 5 x 8 font - 16 character x 1 line (1/8 duty cycle, 1/4 bias) nt7603 com1 com8 seg1 seg80 lcd panel
nt7603 16 v2.2 (b) 5 x 10 font - 16 character x 1 line (1/11 duty cycle, 1/4 bias) nt7603 com1 com8 seg1 seg80 lcd panel com11 com9 (c) 5 x 8 font - 16 character x 2 line (1/16 duty cycle, 1/5 bias) nt7603 com1 com8 seg1 seg80 lcd panel com16 com9
nt7603 17 v2.2 (d) 5 x 8 font - 32 character x 1 line (1/16 duty cycle, 1/5bias) nt7603 com1 com8 seg1 seg80 lcd panel com16 com9 (3) orientation type of nt7603: place the chip on the upper glass (ic face up) nt7603 1 lcd panel c1, s1 c16, s80 c8, s1 c9, s80
nt7603 18 v2.2 (4) bias power connection nt7603 provides 1/4 or 1/5 bias for vari ous duty cycle applications. the built-in pow er division resistor divide voltage is described in the following table. the divi sion resistor is the connecti on of the nt7603, power suppl y, and resistors are also shown as follows: power division 1/8, 1/11 duty cycle - 1/4 bias 1/16 duty cycle - 1/5 bias v 1 v dd - 1/4 v lcd v dd - 1/5 v lcd v 2 v dd - 1/2 v lcd v dd - 2/5 v lcd v 3 v dd - 1/2 v lcd v dd - 3/5 v lcd v 4 v dd - 3/4 v lcd v dd - 4/5 v lcd v 5 v dd - v lcd v dd - v lcd the bias is auto selected by duty cycle. when the lcd is set to 1/16 duty, the bias is set to 1/5. otherwise, the bias is set t o 1/4. the ito option can then select the division resistor value: opt_r1 opt_r0 division resister no ito (1) no ito (1) 2.2k no ito (1) ito on (0) 4k ito on (0) no ito (1) 6.8k ito on (0) no ito (0) no built-in resister (external input) nt7603 v dd v 1 v 2 v 3 v 4 v 5 v dd vr gnd v lcd built-in bias resister 2.2k,4k or 6.8k ohm. nt7603 v dd v 1 v 2 v 3 v 4 v 5 vr gnd v dd r r r r v lcd v dd v 1 v 2 v 3 v 4 v 5 vr v dd r r r r r v lcd exit power division. (the resistance value depends on the lcd panel size) gnd nt7603
nt7603 19 v2.2 (4) lcd waveform a-type, 1/8 duty cycle, 1/4 bias com1 v dd v1 v2 (v3) v4 v5 1234 5 800 clocks 812 1 frame 1 5?5 5i 5^ 5a5a 5m 5h 5p 5h5`5` 5p 5{ 5e5d5` 55?5? 5a 5m 5v55?5?5? 5x5a 5c 5^ 5h5d 5m 5?5 5i 5^ 5a5a 5a 5m 5v55?5?55?5?5?5? frame a-type, 1/11 duty cycle, 1/4 bias com1 v dd v1 v2 (v3) v4 v5 1234 5 800 clocks 11 1 2 1 frame 1 ms 3 . 16 = 11 800 k 540 sec 1 = frame hz 4 . 61 = ms 3 . 16 1 = frequency frame a-type, 1/16 duty cycle, 1/5 bias com1 v dd v1 v2 v4 v5 1234 5 400 clocks 16 1 2 1 frame 1 ms 9 . 11 = 16 400 k 540 sec 1 = frame hz 3 . 84 = ms 9 . 11 1 = frequency frame v3
nt7603 20 v2.2 b-type, 1/8 duty cycle, 1/4 bias com1 v dd v1 v2 (v3) v4 v5 1234 9 800 clocks 1 frame 11.9ms 8 800 540k 1sec frame 1 = = 84.3hz 11.9ms 1 frequency frame = = 5678 16 2 1 b-type, 1/11 duty cycle, 1/4 bias com1 v dd v1 v2 (v3) v4 v5 1234 9 800 clocks 1 frame 16.3ms 11 800 540k 1sec 1frame = = 61.4hz 16.3ms 1 frequency frame = = 5678 22 2 1 10 11 12 21 b-type, 1/16 duty cycle, 1/5 bias com1 v dd v1 v2 v4 v5 1234 400 clocks 1 frame 5a5a5^5i5?5 5a5f 5d5`5` 5e5d5`5{ 5a55?5? 5a5v55?5?5? 5m 5p 5p 5m 5h5d5^5c5x5a 5a5a5^5i5?5 5a 5v55?5?55?5?5?5? 5p 5v55?5?5? 5m 5m 5 32 2 1 15 16 17 31 14 13 v3
nt7603 21 v2.2 low voltage reset the low voltage reset function is used to monitor the supply vo ltage and applies an internal reset at the time when low voltage is detected. functions of the low voltage reset circuit the low voltage reset circuit has the following functions: generates an internal reset signal when v dd v lvr cancels the internal reset signal when v dd > v lvr here, v dd : power supply voltage, v lvr : low voltage reset detect voltage, about 2.0v. application circuit (for reference only) com1 ~ 16 seg1 ~ 80 lcd panel v5 db0 ~ 7 e, r/w, rs mpu vr gnd v dd nt7603
nt7603 22 v2.2 example (for reference only) interface with 8-bit mpu rs r/w e db7 internal signal busy busy no busy data data internal operation instruction busy flag check instruction interface with 4-bit mpu rs r/w e db7 internal signal no busy d7 internal operation instruction busy flag check instruction d3 ac3 d7 d3 ac3 busy
nt7603 23 v2.2 initializing by instruction 1. 8-bit interface power on wait for more than 30 ms after vdd on function set 0 0 db7 0 0 rw rs db6 1 db5 1 db4 n db3 f db2 x db1 x db0 n 1 0 1-line mode 2-line mode f 1 0 5 x 7 dots 5 x 10 dots wait for more than 40 s display on/off control 0 0 db7 0 0 rw rs db6 0 db5 0 db4 1 db3 d db2 c db1 b db0 wait for more than 40 s d 1 0 display off display on c 1 0 cursor off cursor on b 1 0 blink off blink on clear display 0 0 db7 0 0 rw rs db6 0 db5 0 db4 0 db3 0 db2 0 db1 1 db0 wait for more than 1.64ms entry mode set 0 0 db7 0 0 rw rs db6 0 db5 0 db4 0 db3 1 db2 i/d db1 s db0 initialization end i/d 1 0 decrement mode increment mode s 1 0 entire shift off entire shift on write date to ddram: write n 1 0 db7 0 1 rw rs db6 0 db5 0 db4 1 db3 1 db2 1 db1 0 db0 ..........
nt7603 24 v2.2 2. 4-bit interface power on wait for more than 30 ms after vdd on function set 0 0 db7 0 0 rw rs db6 1 db5 0 db4 x db3 x db2 x db1 x db0 n 1 0 1-line mode 2-line mode f 1 0 5 x 7 dots 5 x 10 dots wait for more than 40 s display on/off control 0 0 db7 0 0 rw rs db6 0 db5 0 db4 db3 db2 db1 db0 wait for more than 40 s d 1 0 display off display on c 1 0 cursor off cursor on b 1 0 blink off blink on clear display 0 0 db7 0 0 rw rs db6 0 db5 0 db4 db3 db2 db1 db0 wait for more than 1.64ms entry mode set 0 0 db7 0 0 rw rs db6 0 db5 0 db4 db3 db2 db1 db0 initialization end i/d 1 0 decrement mode increment mode s 1 0 entire shift off entire shift on write date to ddram: write n 1 0 db7 0 1 rw rs db6 0 db5 0 db4 db3 db2 db1 db0 .......... 0 0 0 0 1 0 x x x x 0 0 n f x x x x x x 0 0 1 d c b x x x x x x x x x x x x 0 0 0 0 0 1 x x x x x x x x 0 0 0 0 i/d s x x x x 1 0 1 1 1 0 x x x x x x x x
nt7603 25 v2.2 ordering information part no. cg rom package shipment style NT7603H-BDB01 192 cgrom (ref p13) cog chip form bumped die on blue tape nt7603h-bdt01 192 cgrom (ref p13) cog chip form bumped die on chip tray nt7603-bdw01 192 cgrom (ref p13) cog chip form bumped die on wafer
nt7603 26 v2.2 pad configuration of nt7603 unit: m chip window: 1220 x 5010 m 2 150 166 1 66 149 84 83 67 m n m n a1 a2 n m b2 c1 b3 c2 b4 r r c1 c2 m n a1 b3 b 1 b1 b1 l l l l b1 0,0 x y a1 230 c1 66 a2 5010 c2 511.55 b1 50 r 35 b2 1220 m 42 b3 70 n 90 b4 500.2 l 70 pad location no. pad name x y no. pad name x y 1 gnd -2275 -540 13 gnd -1435 -540 2 gnd -2205 -540 14 gnd -1365 -540 3 gnd -2135 -540 15 gnd -1295 -540 4 gnd -2065 -540 16 osc1 -1225 -540 5 gnd -1995 -540 17 osc2 -1155 -540 6 gnd -1925 -540 18 v1 -1085 -540 7 gnd -1855 -540 19 v2 -1015 -540 8 gnd -1785 -540 20 v3 -945 -540 9 gnd -1715 -540 21 v4 -875 -540 10 gnd -1645 -540 22 v5 -805 -540 11 gnd -1575 -540 23 v5 -735 -540 12 gnd -1505 -540 24 v5 -665 -540
nt7603 27 v2.2 no. pad name x y no. pad name x y 21 v4 -875 -540 67 gnd 2439 -560 22 v5 -805 -540 68 testd 2439 -490 23 v5 -735 -540 69 com[9] 2439 -420 24 v5 -665 -540 70 com[10] 2439 -350 25 v5 -595 -540 71 com[11] 2439 -280 26 opt_r0 -525 -540 72 com[12] 2439 -210 27 gnd -455 -540 73 com[13] 2439 -140 28 opt_r1 -385 -540 74 com[14] 2439 -70 29 v dd -315 -540 75 com[15] 2439 0 30 v dd -245 -540 76 com[16] 2439 70 31 v dd -175 -540 77 seg[80] 2439 140 32 v dd -105 -540 78 seg[79] 2439 210 33 v dd -35 -540 79 seg[78] 2439 280 34 v dd 35 -540 80 seg[77] 2439 350 35 v dd 105 -540 81 seg[76] 2439 420 36 v dd 175 -540 82 seg[75] 2439 490 37 v dd 245 -540 83 seg[74] 2439 560 38 v dd 315 -540 84 seg[73] 2275 540 39 v dd 385 -540 85 seg[72] 2205 540 40 v dd 455 -540 86 seg[71] 2135 540 41 v dd 525 -540 87 seg[70] 2065 540 42 v dd 595 -540 88 seg[69] 1995 540 43 v dd 665 -540 89 seg[68] 1925 540 44 rs 735 -540 90 seg[67] 1855 540 45 rs 805 -540 91 seg[66] 1785 540 46 rw 875 -540 92 seg[65] 1715 540 47 rw 945 -540 93 seg[64] 1645 540 48 e 1015 -540 94 seg[63] 1575 540 49 e 1085 -540 95 seg[62] 1505 540 50 db[0] 1155 -540 96 seg[61] 1435 540 51 db[0] 1225 -540 97 seg[60] 1365 540 52 db[1] 1295 -540 98 seg[59] 1295 540 53 db[1] 1365 -540 99 seg[58] 1225 540 54 db[2] 1435 -540 100 seg[57] 1155 540 55 db[2] 1505 -540 101 seg[56] 1085 540 56 db[3] 1575 -540 102 seg[55] 1015 540 57 db[3] 1645 -540 103 seg[54] 945 540 58 db[4] 1715 -540 104 seg[53] 875 540 59 db[4] 1785 -540 105 seg[52] 805 540 60 db[5] 1855 -540 106 seg[51] 735 540 61 db[5] 1925 -540 107 seg[50] 665 540 62 db[6] 1995 -540 108 seg[49] 595 540 63 db[6] 2065 -540 109 seg[48] 525 540 64 db[7] 2135 -540 110 seg[47] 455 540 65 db[7] 2205 -540 111 seg[46] 385 540 66 opt_lcd 2275 -540 112 seg[45] 315 540
nt7603 28 v2.2 no. pad name x y no. pad name x y 113 seg[44] 245 540 141 seg[16] -1715 540 114 seg[43] 175 540 142 seg[15] -1785 540 115 seg[42] 105 540 143 seg[14] -1855 540 116 seg[41] 35 540 144 seg[13] -1925 540 117 seg[40] -35 540 145 seg[12] -1995 540 118 seg[39] -105 540 146 seg[11] -2065 540 119 seg[38] -175 540 147 seg[10] -2135 540 120 seg[37] -245 540 148 seg[9] -2205 540 121 seg[36] -315 540 149 seg[8] -2275 540 122 seg[35] -385 540 150 seg[7] -2439 560 123 seg[34] -455 540 151 seg[6] -2439 490 124 seg[33] -525 540 152 seg[5] -2439 420 125 seg[32] -595 540 153 seg[4] -2439 350 126 seg[31] -665 540 154 seg[3] -2439 280 127 seg[30] -735 540 155 seg[2] -2439 210 128 seg[29] -805 540 156 seg[1] -2439 140 129 seg[28] -875 540 157 com[8] -2439 70 130 seg[27] -945 540 158 com[7] -2439 0 131 seg[26] -1015 540 159 com[6] -2439 -70 132 seg[25] -1085 540 160 com[5] -2439 -140 133 seg[24] -1155 540 161 com[4] -2439 -210 134 seg[23] -1225 540 162 com[3] -2439 -280 135 seg[22] -1295 540 163 com[2] -2439 -350 136 seg[21] -1365 540 164 com[1] -2439 -420 137 seg[20] -1435 540 165 test -2439 -490 138 seg[19] -1505 540 166 testm -2439 -560 139 seg[18] -1575 540 alk_l -1993.45 109.8 140 seg[17] -1645 540 alk_r 1993.45 109.8
nt7603 29 v2.2 tray information c d g h e f t w1 w2 yy xx 5g5z5b5` section x-x section y-y a b g h e f t w1 w2 5x5b5`5]5b5a5`5z5f5`5]5c5d tray outline dimensions unit: mm symbol dimensions in mm symbol dimensions in mm a 5.33 g 0.85 b 5.93 h 4.05 c 1.52 w1 50.70 d 2.12 w2 45.50 e 1.75 t 45.75 f 1.45 product spec. change notice
nt7603 30 v2.2 nt7603 specification revision history version content date 2.2 adding note 3 and modified fosc from 270khz to 540khz (page 14 , document mistake corrected) modify the number of clock in single duty from 400 to 800 (1/8 duty and 1/11 duty),200 to 400(1/ 16 duty) and fosc from 270k to 540k(page 21) ( document mistake corrected) jun.2002 2.1 rom table deleted(page 14) b-type waveform content modified(page 20 , document mistake corrected) apr.2002 2.0 nov.2001 1.0 original feb.2001

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